my projects.

ASCON128 encryption algorithm in SystemVerilog

ASCON128 encryption algorithm in SystemVerilog

A project focused on implementing the ASCON128 encryption algorithm using SystemVerilog.

Cryptography
Digital Design
FPGA
SystemVerilog
Source
HeartPix

HeartPix

HeartPix is an innovative portable system that combines flexible ECG electrodes and an OLED matrix driven by a microcontroller for real-time heart rate detection and display.

ECG
microcontroller
pcb-design
signal-processing
stm32
Source
DVWA

DVWA

The exploitation of vulnerabilities on the DVWA (Damn Vulnerable Web Application) web application

CSRF
MySQL
PHP
Pentesting
SQL Injection
Web Security
XSS
Source
VeriCrypt

VeriCrypt

AES-128 hardware verification using SystemVerilog testbench, C (DPI-C) client and a Python reference server. Randomized verification, socket-based co-simulation and coverage reporting (ModelSim/Questa).

AES
Coverage
Cryptography
DPI-C
ModelSim
Python
RTL Verification
SystemVerilog
Source
README